1. Field of the Invention
The present invention relates to electronic circuits, and more particularly to a differential current mode gain stage and methods of using the same.
2. Description of the Related Art
Conventional operational amplifiers (op amps) comprise a plurality of transistors and one or more resistors and capacitors.
A differential input, differential output, current mode gain stage and methods of using the same are provided in accordance with the present invention. The differential current mode gain stage provides a high gain for differential input signals and a low gain for common mode signals.
Some conventional op amps require a supply voltage of at least two base-emitter voltages, which is about 1.5 volts (2xc3x970.75 volts). One embodiment of the differential current mode gain stage in accordance with the present invention advantageously allows input and output voltages to be close to a supply voltage. In one embodiment, the differential current mode gain stage may be implemented in a bipolar, low-voltage op amp that operates with a single-supply voltage that is less than two base-emitter voltages across various process and temperature conditions. The ability of the differential current mode gain stage (and the op amp as a whole) to use such a low supply voltage provides a significant advantage over conventional op amps because it is desirable to minimize power consumption.
Another advantage of using the differential current mode gain stage in a single-supply op amp is a reduction in active circuitry. In one embodiment, the differential current mode gain stage allows a single-supply op amp to comprise about 12 transistors (excluding bias devices) instead of about 30 transistors.
Another advantage of the differential current mode gain stage is keeping active transistors from saturating while generating large signals. This advantage is important because transistors in op amps may be operated near saturation.
One aspect of the invention relates to a gain stage in an amplifier. The gain stage comprises a plurality of transistors. The gain stage is configured to keep at least one transistor of the plurality of transistors out of saturation mode while operating with a supply voltage of less than two base-emitter voltages, receiving an input signal, generating a first output signal if the input signal comprises a common mode signal, and generating a second output signal if the input signal comprises a differential signal, the second output signal having a larger amplitude than the first output signal.
Another aspect of the invention relates to a method of providing a signal gain. The method comprises operating with a supply voltage of less than two base-emitter voltages; generating a first output signal if an input signal comprises a common mode signal; generating a second output signal if the input signal comprises a differential signal, wherein the second output signal has a larger amplitude than the first output signal; and keeping the at least one transistor in a circuit out of saturation mode while generating the first and second output signals.